Don't forget the compiler: Why FPGAs for HPC need to look beyond circuits and applications

FPGAs promise to accelerate HPC workloads and ML/AI models while also being energy efficient. However, today’s FPGA tool chains are cumbersome to use, limited to specific use cases and devices, and mostly fail to support workflows requiring multi-node application scenarios.

Last month, I was invited to give a talk at HiPEAC’s F4HD workshop to deliver the message “Don’t forget the compiler: Why FPGAs for HPC need to look beyond circuits and applications”….because some/many FPGA research usually forget to look at realistic industry end-to-end use cases.

In my talk, I analyzed these blind spots of the state of the art and introduce the practical solutions developed within the EVEREST project and the cloudFPGA team in Zurich. Within the H2020 project EVEREST, we developed a design environment that aims to simplify the mapping of complex end-user workflows, like DNN inference or big data processing, to energy-optimized heterogeneous hardware with a focus on FPGA-accelerated systems. I presented potential solutions for distributed HPC/ML applications and a prototype implementation, called DOSA, that provides a one-click solution to partitioning, implementation and deployment of DNNs on multiple FPGAs.

The slides of my presentation can be found here.

Open source code

I’m deeply committed to OpenSource.Science and the code of the above research can be found here: github.com/cloudFPGA/DOSA